Paging and Virtual Memory
Stub. Paging as the dominant address-translation scheme, translation lookaside buffers (TLBs) for making it fast, multi-level and other advanced page table designs for making it space-efficient, swapping mechanisms and page-replacement policies for over-committing physical memory, and how a complete VM system ties all of this together.
Paging replaces segmentation’s variable-sized, externally-fragmenting regions with fixed-size pages, at the cost of needing a page table to translate every virtual page number to a physical frame — a cost this note spends most of its time managing: TLBs cache recent translations so most accesses skip the page-table walk, and multi-level/inverted page tables keep the table itself from consuming an unreasonable fraction of memory. Swapping extends the abstraction further, letting the OS run processes whose combined address spaces exceed physical memory, which raises the page-replacement policy question (which page to evict) that recurs throughout systems design. Closes by assembling all of this into a description of a complete, real virtual memory system.
Outline (TODO — flesh out each)
- Introduction to paging
- Translation lookaside buffers (TLBs)
- Advanced page tables — multi-level, inverted
- Swapping: mechanisms
- Swapping: policies (page replacement)
- Complete virtual memory systems